Type(s) de contenu et mode(s) de consultation : Texte noté : électronique

Auteur(s) : Franco, Jacopo  Voir les notices liées en tant qu'auteur
Kaczer, Ben  Voir les notices liées en tant qu'auteur
Groeseneken, Guido  Voir les notices liées en tant qu'auteur

Titre(s) : Reliability of high mobility SiGe channel MOSFETs for future CMOS applications [Texte électronique] / Jacopo Franco, Ben Kaczer, Guido Groeseneken

Publication : Dordrecht : Springer, 2014

Description matérielle : 1 online resource (xix, 187 pages)

Collection : Springer Series in Advanced Microelectronics ; volume 47

Note(s) : Includes bibliographical references. - Online resource; title from PDF title page (SpringerLink, viewed October 21, 2013).
Due to the ever increasing electric fields in scaled CMOS devices, reliability is becoming a showstopper for further scaled technology nodes. Although several groups have already demonstrated functional Si channel devices with aggressively scaled Equivalent Oxide Thickness (EOT) down to 5, a 10 year reliable device operation cannot be guaranteed anymore due to severe Negative Bias Temperature Instability. This book focuses on the reliability of the novel (Si)Ge channel quantum well pMOSFET technology. This technology is being considered for possible implementation in next CMOS technology nodes, thanks to its benefit in terms of carrier mobility and device threshold voltage tuning. We observe that it also opens a degree of freedom for device reliability optimization. By properly tuning the device gate stack, sufficiently reliable ultra-thin EOT devices with a 10 years lifetime at operating conditions are demonstrated. The extensive experimental datasets collected on a variety of processed 300mm wafers and presented here show the reliability improvement to be process- and architecture-independent and, as such, readily transferable to advanced device architectures as Tri-Gate (finFET) devices. We propose a physical model to understand the intrinsically superior reliability of the MOS system consisting of a Ge-based channel and a SiO2/HfO2 dielectric stack. The improved reliability properties here discussed strongly support (Si)Ge technology as a clear frontrunner for future CMOS technology nodes

Sujet(s) : Physique  Voir les notices liées en tant que sujet
Semiconducteurs  Voir les notices liées en tant que sujet

Indice(s) Dewey :  621.381 5284 (23e éd.) = Transistors à effet de champ  Voir les notices liées en tant que sujet ; 537.622 (23e éd.) = Semi-conductivité  Voir les notices liées en tant que sujet

Identifiants, prix et caractéristiques : ISBN 9789400776630

Identifiant de la notice  : ark:/12148/cb44722594p

Notice n° :  FRBNF44722594 (notice reprise d'un réservoir extérieur)

Table des matières : Degradation mechanisms ; Techniques and devices ; Negative Bias Temperature Instability in (Si)Ge pMOSFETs ; Negative Bias Temperature Instability in nanoscale devices ; Channel Hot Carriers and other reliability mechanisms ; Conclusions and perspectives.