Notice bibliographique
- Notice
Type(s) de contenu et mode(s) de consultation : Texte noté : électronique
Auteur(s) : FTRTFT 2002 (2002 ; Oldenburg, Germany)
Titre(s) : Formal techniques in real-time and fault-tolerant systems [Texte électronique] : 7th International Symposium, FTRTFT 2002, co-sponsored by IFIP WG 2.2, Oldenburg, Germany, September 9-12, 2002 : proceedings / Werner Damm, Ernst-Rüdiger Olderog (eds.)
Publication : Berlin ; New York : Springer, cop. 2002
Description matérielle : 1 online resource (x, 453 pages)
Collection : Lecture notes in computer science ; 2469
Note(s) : Includes bibliographical references and index
This book constitutes the refereed proceedings of the 7th International Symposium
on Formal Techniques in Real-Time and Fault-Tolerant Systems, FTRTFT 2002, held in
Oldenburg, Germany, in September 2002. The 17 revised full papers presented together
with 2 invited tutorials and 6 invited papers were carefully reviewed and selected
from 39 submissions. The papers are organized in topical sections on synthesis and
scheduling, timed automata, bounded model checking, verification and conformance testing,
and UML models and model checking
Autre(s) auteur(s) : Damm, Werner. Fonction indéterminée
Olderog, E.-R. Fonction indéterminée
Sujet(s) : Informatique
Temps réel (informatique)
Langages de programmation
Tolérance aux fautes (informatique)
Microprocesseurs
Ordinateurs -- Mémoires
Microprogrammation
Indice(s) Dewey :
004.33 (23e éd.) = Traitement en temps réel
Identifiants, prix et caractéristiques : ISBN 9783540457398
Identifiant de la notice : ark:/12148/cb44690961m
Notice n° :
FRBNF44690961
(notice reprise d'un réservoir extérieur)
Table des matières : Invited Tutorials ; UppaaL Implementation Secrets ; Software Hazard and Safety Analysis
; Invited Papers ; Real-Time Operating Systems: Problems and Novel Solutions ;
Real-Time UML ; Eager Class Initialization for Java ; Applications of Formal Methods
in Biology ; An Overview of Formal Verification for the Time-Triggered Architecture
; Scheduler Modeling Based on the Controller Synthesis Paradigm ; Synthesis and
Scheduling ; Component-Based Synthesis of Dependable Embedded Software ; From the
Specification to the Scheduling of Time-Dependent Systems ; On Control with Bounded
Computational Resources ; Timed Automata I ; Decidability of Safety Properties of
Timed Multiset Rewriting ; Extending Timed Automaton and Real-Time Logic to Many-Valued
Reasoning ; Fault Diagnosis for Timed Automata ; Bounded Model Checking ; Verification
of Timed Automata via Satisfiability Checking ; Take It NP-Easy: Bounded Model Construction
for Duration Calculus ; Towards Bounded Model
